Volume 31,
Number 1,
January 1982
Correspondence
Volume 31,
Number 2,
February 1982
Correspondence
Volume 31,
Number 3,
March 1982
- Hans-Werner Six, Derick Wood:
Counting and Reporting Intersections of d-Ranges.
181-187
- Toshihide Ibaraki, Tsunehiko Kameda:
Deadlock-Free Systems for a Bounded Number of Processes.
188-193
- Werner E. Kluge, Kurt Lautenbach:
The Orderly Resolution of Memory Access Conflicts Among Competing Channel Processes.
194-207
- Leah J. Siegel, Howard Jay Siegel, Arthur E. Feather:
Parallel Processing Approaches to Image Correlation.
208-218
- Will E. Leland, Marvin H. Solomon:
Dense Trivalent Graphs for Processor Interconnection.
219-222
- Gregor von Bochmann:
Hardware Specification with Temporal Logic: En Example.
223-231
- Jochen A. G. Jess, H. G. M. Kees:
A Data Structure for Parallel L/U Decomposition.
231-239
- Marco Ajmone Marsan, Mario Gerla:
Markovs Models for Multiple Bus Multiprocessor Systems.
239-248
- Robert Geist, Kishor S. Trivedi:
Optimal Design of Multilevel Storage Hierarchies.
249-260
- Richard P. Brent, H. T. Kung:
A Regular Layout for Parallel Adders.
260-264
Correspondece
- Marek Kubale:
Comments on ``Decomposition of Permutation Networks''.
265
- Noel R. Strader II:
Comments on ``Magnetic Bubble Memory Architectures for Supporting Associative Searching of Relational Databases''.
265-266
Volume 31,
Number 4,
April 1982
Correspondece
Volume 31,
Number 5,
May 1982
- Neil R. Lincoln:
Technology and Design Tradeoffs in the Creation of a Modern Supercomputer.
349-362
- David J. Kuck, Richard A. Stokes:
The Burroughs Scientific Processor (BSP).
363-376
- Kenneth E. Batcher:
Bit-Serial Parallel Processing Systems.
377-384
- Robert G. Arnold, Robert O. Berg, James W. Thomas:
A Modular Approach to Real-Time Supersystems.
385-398
- Earl E. Swartzlander Jr., Barry K. Gilbert:
Supersystems: Technology and Architecture.
399-409
- James P. Ignizio, David F. Palmer, Catherine M. Murphy:
A Multicriteria Approach to Supersystem Architecture Definition.
410-418
- Keki B. Irani, Nicholas G. Khabbaz:
A Methodology for the Design of Communication Networks and the Distributuion of Data in Distributed Supercomputer Systems.
419-434
- Duncan H. Lawrie, Chandra R. Vora:
The Prime Memory System for Array Access.
435-442
- George B. Adams III, Howard Jay Siegel:
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems.
443-454
- Bruce W. Arden, Ran Ginosar:
MP/C: A Multiprocessor/Computer Architecture.
455-473
Volume 31,
Number 6,
June 1982
Correspondence
Volume 31,
Number 7,
July 1982
- Ytzhak H. Levendel, Premachandran R. Menon:
Test Generation Algorithms for Computer Hardware Description Languages.
577-588
- Janak H. Patel, Leona Y. Fung:
Concurrent Error Detection in ALU's by Recomputing with Shifted Operands.
589-595
- Shigeo Kaneda, Eiji Fujiwara:
Single Byte Error Correcting - Double Byte Error Detecting Codes for Memory Systems.
596-602
- David J. Taylor, James P. Black:
Principles of Data Structure Error Correction.
602-608
- Tülin Erdim Mangir, Algirdas Avizienis:
Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs.
609-616
- P. M. Melliar-Smith, Richard L. Schwartz:
Formal Specification and Mechanical Verification of SIFT: A Fault-Tolerant Flight Control System.
616-630
- Harry Rudin, Colin H. West:
A Validation Technique for Tightly Coupled Protocols.
630-636
- Jean-Michel Ayache, Jean-Pierre Courtiat, Michel Diaz:
REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control.
637-647
- John F. Meyer:
Closed-Form Solutions of Performability.
648-657
- Xavier Castillo, Stephen R. McConnel, Daniel P. Siewiorek:
Derivation and Calibration of a Transient Error Reliability Model.
658-671
Correspondence
Volume 31,
Number 8,
August 1982
Correspondence
Volume 31,
Number 9,
September 1982
Correspondence
Volume 31,
Number 10,
October 1982
Special Issue on Computer Architecture for Pattern Analysis and Image Database Mangement
- Chuan-lin Wu, Tse-Yun Feng, Min-Chang Lin:
Star: A Local Network System for Real-Time Management of Imagery Data.
923-933
- Michael R. Warpenburg, Leah J. Siegel:
SIMD Image Resampling.
934-942
- Todd Kushner, Angela Y. Wu, Azriel Rosenfeld:
Image Processing on ZMOB.
943-951
- Dharma P. Agrawal, Ramesh Jain:
A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis.
952-962
- Wesley E. Snyder, Carla D. Savage:
Content Adressable Read/Write Memories for Image Analysis.
963-968
- Faye A. Briggs, King-sun Fu, Kai Hwang, Benjamin W. Wah:
PUMPS Architecture for Pattern Analysis and Image Database Management.
969-983
- Kazunori Yamaguchi, Tosiyasu L. Kunii:
PICCOLO Logic for a Picture Database Computer and Its Implementation.
983-996
Correspondence
- Dan Antonsson, Björn Gudmundsson, Tomas Hedblom, Björn Kruse, Arne Linge, Peter Lord, Tomas Ohlsson:
PICAP - A System Approach to Image Processing.
997-1000
- Ashok V. Kulkarni, David W. L. Yen:
Systolic Processing and an Implementation for Signal and Image Processing.
1000-1009
- Howard A. Sholl, Kevin Morris, James Norris:
A Multimicroprocessor System for Real-Time Classification of Railroad Track Flaws.
1009-1017
- Lionel M. Ni, Kwan Y. Wong, Daniel T. Lee, Ronnie K. Poon:
A Microprocessor-Based Office Image Processing System.
1017-1022
- Leonard Uhr:
Comparing Serial Computers, Arrays, and Networks Using Measures of ``Active Resources''.
1022-1025
- Prashant D. Vaidya, Linda G. Shapiro, Robert M. Haralick, Gary J. Minden:
Design and Architectural Implications of a Spatial Information System.
1025-1031
Volume 31,
Number 11,
November 1982
- Richard E. Buehrer, Hans-Joerg Brundiers, Hans Benz, Bernard Bron, Hansmartin Friess, Walter Haelg, Hans Jürgen Halin, Anders Isacson, Milan Tadian:
The ETH-Multiprocessor EMPRESS: A Dynamically Configurable MIMD System.
1035-1044
- Kang G. Shin, Yann-Hang Lee, J. Sasidhar:
Design of HM2p - A Hierarchical Multimicroprocessor for General Purpose Applications.
1045-1053
- Sun-Yuan Kung, K. S. Arun, Ron J. Gal-Ezer, D. V. Bhaskar Rao:
Wavefront Array Processor: Language, Architecture, and Applications.
1054-1066
- Keki B. Irani, Kuo-Wei Chen:
Minimization of Interprocessor Communication for Parallel Computation.
1067-1075
- Robert K. Montoye, Duncan H. Lawrie:
A Practical Algorithm for the Solution of Triangular Systems on a Parallel Processing System.
1076-1082
- Michel Dubois, Faye A. Briggs:
Effects of Cache Coherency in Multiprocessors.
1083-1099
- Philip Heidelberger, Kishor S. Trivedi:
Queueing Network Models for Parallel Processing with Asynchronous Tasks.
1099-1109
Correspondence
Volume 31,
Number 12,
December 1982
- Lee A. Hollaar:
Direct Implementation of Asynchronous Control Units.
1133-1141
- Takanobu Baba, Ken Ishikawa, Kenzo Okuda:
A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions.
1142-1156
- Erol Gelenbe, Alain Lichnewsky, Andreas Stafylopatis:
Experience with the Parallel Solutions of Partial Differential Equations on a Distributed Computing System.
1157-1164
- Miron Abramovici, Melvin A. Breuer:
Fault Diagnosis in Synchronous Sequential Circuits Based on an Effect-Cause Analysis.
1165-1172
- Shinji Nakamura, Gerald M. Masson:
Lower Bounds on Crosspoints in Concentrators.
1173-1179
- Marco Ajmone Marsan, Gianfranco Balbo, Gianni Conte:
Comparative Performance Analysis of Single Bus Multiprocessor Architectures.
1179-1191
- Hiroto Yasuura, Naofumi Takagi, Shuzo Yajima:
The Parallel Enumeration Sorting Scheme for VLSI.
1192-1201
- Robert J. McMillen, Howard Jay Siegel:
Routing Schemes for the Augmented Data Manipulator Network in an MIMD System.
1202-1214
- Kai Hwang, Yeng-Heng Cheng:
Partitioned Matrix Algorithms for VLSI Arithmetic Systems.
1215-1224
Correspondence
Copyright © Mon Mar 15 04:06:53 2010
by Michael Ley (ley@uni-trier.de)
